Signal averager

ABSTRACT

A special purpose computer is used to calculate the statistical T-test as a measure of the significance of the difference between two sample populations. The computer includes a four channel average response computer, squaring circuits, square root circuits, dividing circuits, differential circuits and summing circuits.

United States Patent .lohn I [451 Dec. 5, 1972 1541 SIGNAL AVERAGER [72]Inventor: ErwinRoy John, Riverdale,N.Y.

[73] Assignee: Neuro-Data, lnc., Cliffside Park,

163] (.ontinuation-in-purt of Ser. No. 878,158, Nov. 19,

1969, abandoned.

[52] US. Cl. ..235/l50 .53, 235/15 1 .13, 235/152,

. 255/193 511 lnt.Cl. ..G06g 7/28, G06j 1/00 581 Field oiSearch..235/l83,184,'193,1 93.5,

Bishop ..235/l5l.3 X

3,471,685 10/1969 3,506,813 4/1970 Trimble.... ..235/l52 3,515,8606/1970 Fitzgerald ..235/l5l.13 3,529,140 9/1970 Doering ..235/l83 X3,534,402 10/1970 Crowell et al. ..235/l5l.l

OTHER PUBLICATIONS The RCLiac 128 Sealer-Analyzer Radiation CounterLaboratories, Inc. Publication Adler et al., Introduction to Probabilityand Statistics (Textbook) W. H. Freeman & Co. an Francisco 1968. Pages40-43 and 136-148.

Primary Examiner-Felix D. Gruber Attorney-Eliot S. Gerber [5 7] ABSTRACT6 Claims, 13 Drawing Figures [56] References Cited UNITED STATES PATENTS3,147,370 9/1964 Lowman ..235/l51.13 3,339,063 8/1967 Norsworthy..235/l93 X i ,106 {02 XX m0 7 4 i n; X CHANNEL 1 CHANNEL I09 if ml 1% WsauARs AVERAGE N1 1101.0 L 855mm: 10 W4 awn/me 7;

1 m7 Z0 Mi dZAN/IEL L eee'mfp PATENTEDnCc 5 I972 STEP I SHEET 2 BF 5DATA ACCUMULATION Nx COUNTERI A El -zx 0 CHANNEL! zx m CHANNEL 2 zYu)CHANNEL 3 AD 3 6] ZYZU) CHANNEL4 F/G 3 w COUNTER 2 STEP 2 COMPUTATION OFixm /N SQ 2 zx (L) ZX(z/N [Emu DIFF. AMP.

2X( zx( 01 L NL NL] INVEN TOR E. ROY JOHN SHEET t Of 5 PATENTEH E 5 I97?MR 1 P m 5? i A TTORNE Y PATENTEDUEC 5 I972 aurpur 4 015 CLOCK PUL SEcomm/v0 1 J W m M lid 2 06 Dinar K 7 7 B INVENTOR I. Roy JOHN SIGNALAVERAGER This application is a continuation-in-part application based onUS. Pat. application Ser. No. 878,158 filed Nov. 19, 1969, now abandonedand entitled Signal Averager. I

The present invention relates to computers and more particularly to aspecial purpose computer including a signal averager and a T-testdevice.

Signal averaging is a method of separating a signal from noise. Thesignal may be from any source, as long as it is repeated, and the noisemay be of any type, as long as it is more random than the signal. Forexample, when the brain waves of a subject are evoked by some stimulus,for example, a flashing light, the waves may be undistinguishable fromthe other electrical activity of the brain, which is considered as beinga form of noise in this context. On an oscilloscope, a single evokedresponse may be so buried in the noise as to be undistinguishable.

Noisemay be of various types, depending upon the context. Aphotoelectric tube, even without activation by a photon, will exhibitsome slight outpfut due to the thermal release of electrons from itscathode. Some of the types of noise have been called fwhite noise,gaussian noise, shot noise and on-going electrical activity," dependingupon theirorigin or context. However, all these types of noise arerandom, i.e., they. do not present a steady repeated signal. Other typesof unwanted signals, which are .considered noise, may present a steadysignal. For example, the 60-cycle hum from the power line which isamplified by a radio or record player is a type of noise.

The efforts to extract signals from their noisy background have beencostly and, to some extent, rewarded. But every time a signal isrescued, it opens up the hope thatan even fainter signal may beretrieved or found.

One approach of the prior art has been to use bandwidth filtering. Whenthe noise is random, a proper selection of a filter to pass the signalwill eliminate all the noise except the noise which is close to thefrequency of the signal. If the signal is weak, even that noise mayprove troublesome. However, if the noise has a frequency close to thatof the signal, then both' the noise and signal will pass the filter andnot be separated.

The approach in signal averaging to the signal-noise problem is to takea number of samples of the signal plus its surrounding noise at a numberof intervals in a repeated series. If the repeated series are each oftime I, the series is 1,, l 1 If one takes sub-intervals of each timeperiod 1, which need not be uniform but usually are, the sub-intervals(sampling impulses) are i,, i i,,, etc. One then has for a period l-,,for example, five samples 1 -1, 1 -2, 1 -3, 1 -4, 1 -5. At each timeperiod 1 l, the signal is repeated and the noise is random. For eachexample i i the signal contribution is the same in each interval 1, lbut the noise may add or subtract, or bethe same, in a random fashion.It is necessary for the sample values, to be summed and averaged. Thesignal component of the sample is a constant for any single point, soits contribution to the stored sum will increase proportionally to thenumber of repetitions. The noise component will increase proportionallyto the square root of the number of repetitions. Thus, thesignal-to-noise ratio is improved by an amount equal to v N. Theaveraging may take place at the end of the samples or after'each sample.In either event, the instrument requires a memory system, for example, amagnetic memory system.

However, average response computers suffer from certain limitations. Twoaverages may be the same, although the distribution of values in the twosamples was quite different. Furthermore, the significance ofdifferences between two averages is impossible to assess accuratelywithout knowledge of the appropriate use of measures of variance andstatistical tests of significance. r

The T-test is a statistical test which measures the significance of thedifference between two sample populations, taking into account both therespective means and variances. For example, consider two averages X andY, each based upon 10 measurements. For the difference between the twoaverages [X Y] to be significant at the 0.001 level [i.e., a differenceof that size would occur by chance only one time in a thousand], thevalue of T must be greater than 4.5 87. If the samples were based on 25measurements, the same probability level would only require a T value of3.725.

Preferably both the number of sweeps N and the level-of significance maybe varied on the T-test computer to set a predetermined T-test standard.For example, the tester may set the maximum number of sweeps N at 25 andthe level on significance P at 0.001. As an example, inelectroencephalography,for each stimulus group either the T-test'of theevoked response (X values) compared to brain wave ongoing activitybackground (Y values) will exceed 3.725 (the predetermined T standard)or be less than 3.725. If the T-test comparison of X and Y is largerthan the predetermined T" standard, then there is only 1 in 1,000 chancethat the difference is merely random. Occurrence of such a T-test resultwould provide an objective indication that the subject probablyresponded to the stimulus. This result could be recorded.

It is the objective of the present invention to provide a specialpurpose computer which, by signal averaging methods, is able todistinguish a signal from its noise environment and which will provide ameasure of the statistical variance of the averaged signal.

It is a further objective of the present invention to provide such acomputer which will provide an indication of the statisticalsignificance of the difference between two signals derived from a noisyenvironment.

It is a further objective of the present invention to provide such adigital computer which will provide a method of process control.

-In accordance with the present invention, a relatively small size andlow-cost special purpose computer is provided. An adjustable clockcontrols the sampling rate.'ln this way the signal is measured as afunction of time after the start.

The computation of the T-test involves obtaining from the averageresponse computer the sum of the voltage values X at similar times iover a number of repeated cycles (2X6) The circuit provides (1) the sumof the squares of those voltages (2X (1')) (2) the division of the sumby the number of repetitions N and the squaring of the result ZXWN), and(3) the division of the sum of the squares by N, giving (2X 0) N Thevariance 0' is equal to (EX (i))/( N (ZX( i))/( N I 01 mm Man In orderto compute the T-test, two averages, M and M and their respectivevariances a, and must first be computed. The T-test is then computed bydividing the difference between the two averages by the square root ofthe sum of the variances: t=(M, M +62 This computation must be performedat every point i over the epoch for which the functions X (i) and X (i)are to be described. These computations may be performed using a binarycode by digital devices or, alternatively, using analog devices.

Other objectives of the present invention will be apparent from thedetailed description of a preferred embodiment which follows, taken inconjunction with the accompanying drawings, in which:

FIG. 1 is a flow sheet illustrating a closed-loop process control;

FIG. 2 is a block schematic diagram of the one embodiment of the digitalcomputer of the present inventron;

FIGS. 3-6 are block diagrams showingthe computations performed in thet-test device;

FIG. 6A is a block circuit diagram of another embodiment of the T-testcomputer; and

FIGS. 7A, 78, 8A, 8B, 9 and 10 are circuit diagrams ofspecific circuitsused in the embodiment of the T-test computer of FIG. 6A.

Before explaining the accompanying drawings, the

1 operation of the device will first be illustrated by three specificexamples of its application. These examples are (I the derivation of ahypothesized signal from its noisy environment and the testing of thecredibility of that signal, (2) the testing of the effect of variationsin conditions on a process, and (3) the quality control of articles'whose testing involves the separation of the output signal from noise.

I. Credibility of the Derived Signal The average response computer, asit is generally used, operates from voltages produced by voltage pickupsor transducers. The transducers, such as temperature or'pressure-to-voltage instruments, are connected to the input of theaverage response computer. generally, the quantity being measured is asample X(i) of the total population. That is, only a few measurementsare made compared to how many could be made. For example, a brain waveor a chemical process may be measured for I minute, but the brain waveor process continues much longer. The averages derived by the averageresponse computer are therefore not true averages ,u.(i) of thepopulation but rather averages of the sample, i.e., X(i). The t-ratio isthe appropriate test for inferring characteristics of the populationfrom this sample.

The T-test computer provides an indication of the credibility of thehypothesized, i.e., average or extracted signal. In electricalengineering, the signal-tonoise ratio,S/N,is used to indicate thecredibility of a signal. If the ratio is low, there is much noise andthe signal may not be considered to be trustworthy. Generally, theseevaluations are by an empirical basis. It is derived from experiencedepending upon the device, how much noise makes what appears as thesignal unreliable. In the context of the average response computer, theaverage is hypothesized as reconstituting the signal. The hypothesis isthat the extracted signal is the actual signal. After the signal is soderived, it may be compared with the raw data. The ratio of the derivedsignal to the original value at each point may be considered thesignal-to-noise ratio at that moment. In the chart below, there arethree events I,, I and I;,, for example, three sequential brain waves.Each wave is sampled at time points T T T and T for a total of 12values. The raw signal-to-noise ratios require a highly subjectiveanalysis of the reliability of the ratio; for example, the ratios of15:2 or 9:6 may be good or not and valid signals may be discarded. TheT-test provides an objective statistical basis for evaluating the signaland, in addition, provides a standard weight for comparison purposes.The T-test formula is (the mean) (the variance) E (value of the sum ofthe samples) N (number of samples or measurements of the signal) For T,,with 2 of freedom the level of significance (using a T-test table) is l21 that the values would happen by chance; but for T it is 60 of thetime that the values would so occur. In other words 7, has a much higherreliability than T in the sense of the credibility of the component at Tcompared to T T, T T T4 I z 4 3 l0 0 Average I 5 3 8 1 The most probableshape for the process K1) is thus:

S/N 1 5:1 3:3 8:1 1:3 ratio Total :2 9:6 24:3 3:5 SIN The T-test isneeded when there has been obtained one set of sample averages X. It isthen desired to check the likelihood that this set of sample averagescame from a population that had a true average p.. That is, there isprovided a test for the likelihood that X =y..

II. Process Control A second function of the present T-test computer isto test th e likelih ood that two separate sets of sample averages X andX come from the same parent population. In this case, the truecharacteristics of the present population are not tested. That is, onedoes not care what u. 01'0' are. All that is necessary and desired istoknow if there is a significant difference between the two sets ofreadings, or if they both corrfe from the parent population.

In this case, the appropriate formula is:

12-71. I [H -H2 1 whge:

{f mean 1 X mean 2 0- variance 1 02 =variance 2 Once T has beencomputed, standard statistical tables are used to establish theprobability of obtaining a specified difference, by chance, between twomeans based on particular sample sizes.

Under standard conditions, the mean )7, andvariance of of somephenomenon are obtained, using channels 1 and 2 of the computer. Somecondition is then changed, perhaps as an experimental maneuver. A secondmeans Y and variance of are computed, using channels 3 and 4 of thecomputg. The significance of the difference between )7, and X is thenassessed by computing t, The channels used to compute X and 0 are thenerased. A second change of condition is imposed on the system beingmeasured and a third mean X and variance of are computed. T hesignificance of the difference between )7, and X is assessed bycomputing W Now, if t t, the second change of condition or experimentalmaneuver had a greater effect on the system than the first. If z, r, thefirst maneuver was more effective than the second. In this way, theaverage response computer has the capability to control a system or aprocess so as to obtain optimum effects. An operator or automaticcontrols are in a servoloop and are instructed as to the sequence ofsteps which will maximize or minimize the difference between the stateof a system and some reference state. Note that the reference state canbe either an initial measurement from the system itself or somearbitrarily selected configuration which is desired by the operator. TheT-test computer can direct a process either to achieve or avoid someselected criterion, provided that Know the necessary variables areplaced under operator or automatic control, and operator or automaticassessment of the value of T is appropriately linked to those variables.Process control by T-test would be organized as shown in FIG. 1. 111.Quality Control An electronic circuit or component is tested byproviding it with an input voltage. The circuit produces a pulse, whichis extracted from its noise by average response computer. Then T-test isapplied to determine the quality of the circuit. In some instances, forexample, breakdown voltage, a statistical quality control program isrequired as the testing of the circuit destroys or injures it. Forexample, in a population of 100 circuits, five are drawn at random (notperiodically). These five are tested using an average response computer;for example, they may be automatically tested for their breakdownvoltage. Their result is an average of 5 volts. However, thespecification requires 6 volts.

If the voltages of the five units are, respectively, 3, 6, 4, 5, 7volts, then the T-test is:

for which 4 of freedom is 10 5 level of significance, i.e., it issignificant at the 4 level. In other words, there is a chance that theentire population (the units) is below the specification.

The preferred embodiment of the t test computer is shown in FIG. 6A. Asshown, the computer has two inputs-an Xinput on line 100 and a Y inputon line 101. The inputs 100 and 101 are to a two-channel sample and holdcircuit 102. The purpose of the sample and hold circuit 102 is to samplethe two signals X and Y and to hold them so that they become in phase. Asuitable sample and hold circuit is shown in FIG. 7A. The output lines103 and 104 of the sample and hold circuit 102 are each directlyconnected to one channel of a four-channel average response computer105. In addition, the outputs 103 and 104 are connected to respectivesquaring circuits 106 and 107, the details of the squaring circuit beinggiven in connection with FIG. 7B. The average response computer gives avalue of samples taken periodically in time divided by the number ofsamples, thereby providing a running average, that is, an average whichchanges with the additional samples. A suitable average responsecomputer is described in Clynes US. Pat. No. 3,087,487. Suitablemulti-channel average response computers are Mnemotron (TechnicalMeasurement Corp.) Series 400 and the HewletbPackard Model HP 5480A,available from the Hewlett-Packard Company, Palo Alto, Calif. anddescribed in the Hewlett'Packard Journal, April 1968, pages 8-13. Theoperator determines the number of samples N by the sampling rate whichis set by the clock pulses produced by an internal clock, such as acrystal controlled oscillator whose output is divided, within theaverage response computer 105. The output of the first channel 108 isthe average of the sum of the values of X, i.e., the sum of the voltagesof each of the samples divided by the number of the samples N, which isthe mean and may be expressed by the formula: EX/N I M, The output ofthe channel 109 of the average response computer 105 is the sum of the Xvalues squared over the number of samples and may be expressed by theformula: EX/N =M,. The output of channel 110 is the sum of the I valuesover the number of samples and may be expressed by the formula: 2Y/N Mand the output of channel 110 the sum of the Y values squared over thenumber of samples and may be expressed by the formula: EY N Each of thechannels is connected to a four-channel sample and hold circuit 111. Theonly purpose of the sample and hold circuit 111 is to eliminate timeskewing errors. An alternative is to have a separate memory for each ofthe channels, in which case the sample and hold circuit 111 would not benecessary. The circuits of each of the four channels of the sample andhold circuit 111 are the same as the sample and hold circuit shown inFIG. 7A.

The output of channel 108, which is the mean, is then squared in asquaring circuit 1 12 and similarly the output of channel 110 is squaredin a squaring circuit 1 13. Each of the squaring circuits is the same asshown in FIG. 7B. The output of the squaring circuit and the output ofchannel 108 are then combined in a differential amplifier 114. Similarlythe outputs of the squaring circuit 113 and channel 110 are combined indifferential amplifier 115. The detailed circuit of a suitabledifferential amplifier is shown in FIG. 8A. The formula for thecomputation which occurs in the differential amplifier 114 is:

and the formula for the mathematical computation which occurs in thedifferential amplifier 115 is yaw y Y) y The outputs of the differentialamplifiers are connected to the respective divide circuits 116 and 117,the details of which are shown in FIG. 9. The divide circuit 116 dividesthe variance 0, by the number of samples. The number of samples isobtained from a sweep counter of the type shown in U.S. Pat. No.3,506,813. The output of the device circuits 1 l6 and 1 17 are connectedto summing amplifier (adder) l 18 which performs the followingmathematical computation:

a suitable circuit being shown in FIG. 8B. The output of (EX/N 2Y/Ny)The output of the divide circuit is to the absolute value circuit 121,shown in FIG. 10, which provides the final result of the T-test.

Ex 2y Na: Ny

E E Nx Ny A suitable squaring circuit, as shown FIG. 78, uses threeintegrated circuits. The integrated circuits and 151 are operationalamplifiers and may be of the type Motorola No. MC lS56-G. Thatintegrated circuit is a compensated and monolithic operationalamplifier. The integrated circuit 152 is a multiplier which, suitably,may be Motorola Type l594-L. The multiplier, as its two inputs 153 and154 derived from a common line 155 which is the output of theoperational amplifier 150, and acts to square the input from line 155;that is, its inputs are tied together. A suitable integrated circuit isa monolithic four-quadrant multiplier where the output voltages are alinear product of two input voltages. The Motorola 1594-L is a variabletransconductance multiplier with internal level shift circuitry andvoltage regulation. The scale factor is adjustable and preferably is setto be one-tenth of input. An operational amplifier 151 is used tocomplete the multiplier connections from the integrated circuit 152. Itsoutput 156 provides a square of the input at 157. This type ofmultiplier connection is described in further detail in thespecification sheet dated October I970 DS-9l63 from Motorola of Phoenix,Ariz., of their l594-L integrated circuit.

A suitable sample and hold circuit is shown in FIG. 7A. It uses anoperational amplifier 140. Preferably operational amplifier 140 is anintegrated circuit, for example, of the type Motorola No. I456G,described above.

A suitable differential amplifier circuit is shown in FIG. 8A. It usesan operational amplifier 160 having two inputs 161 and 162. Preferablythe operational amplifier 160 is an integrated circuit. A suitableintegrated circuit is Motorola No. I456G described in the specificationsheet DS9I47RI dated April 1970 as being epitaxial passivated andmonolithic. It has a power supply voltage of+l 8V dc and -l 8V dc, apower bandwidth of 40KH7. and power consumption of 45m W max.

' The summing amplifier of FIG. 88 also uses an operational amplifier165. The two inputs to be added are connected to one input of theamplifier 165. A suitable operational amplifier is the integratedcircuit Motorola No. 14566 described above.

A suitable divider circuit is shown in FIG. 9. It uses a linearmultiplier and an operational amplifier 171. Preferably the multiplier170 and the amplifier 171 are integrated circuits. A suitable integratedcircuit for the multiplier 170 is Motorola No. 1594, described above,and for the amplifier Motorola No. 14566, also described above. Theinputs are 172 and 173 and the output at 174.

A suitable square root circuit is shown in FIG. 9. The square rootcircuit is a special case of a divider in which 9 the two inputs to themultiplier are connected together Consequently the input line 173 andthe input line 172 are connected together to form a common input line175, shown in dashed line and the ground.

A suitable absolute value circuit is shown in FIG. 10. It uses twooperational amplifiers 176 and 177. Preferably they are integratedcircuits and may be of the type Motorola No. l456G described above. The

input 178 is to the minus inputof amplifier 176 and the output 179 isfrom amplifier, 177. The purpose of the circuit of FIG. 10 is to providea positive quantity if the X or the Y terms are larger, theabsolutevalue being the value regardless of the plus or minus sign of thequantity.

The block schematic diagram of another embodiment of the system of thepresent invention is shown in FIG. 2. The input is to line 10. Atypicalinput would be an electrical connection with a continuousrepeated signal buried in noise, such as an electroencephalographicsignal. The input signal is filtered by-band filters 11, which eliminatenoise outside th e frequency bandof the signal. The filtered signal isthen communicated to the analog-to-digital converter 12 whichconvertsthe signal, in the form of a wave of continuous voltage overtime, into its digital representation, at some predetermined clock rate.Preferably the digital representation is an eight-bit binary code, sothat it will be compatible with the computer code.

The digital code from converter 12 is communicated to the sequenceswitch 13 which may be a shift register. The switch 13 sends the digitalrepresentations of the signal to one of the sequence of themulti-channel memory units 14-18, which are the address of the averageresponse computer. The memory units 14-18 are part of a high-speedmemory 19 which may be a ferrite core magnetic matrix plane, or anyother suitable memory.

I The sequence switch 13 is controlled by the signal sync pulsegenerator 20, for example, an adjustable duty cycle free-runningmultivibrator. The sync pulse generator 20 is set to indicate the startof each repeated wave, i.e., the l l periods. The generator 20 alsocontrols the external stimulator 21, which is electroencephalography maybe a flashable light. The sequence switch switches back to the firstmemory unit 14 when it receives a pulse from generator 20. The sequenceswitch 13 is also controlled by the sample pulse generator 28 whichgenerates the sample pulses i i,,. For example, 10 pulses may begenerated for each period I, l, within which the wave is repeated, inwhich case 10 memory units would be required. The sample pulse generatorcontrols the switch 13 so that, at each sample pulse, the digitalrepresentation is sent to the next memory address 14-18 in sequence. Thesequence switch 22, at the conclusion of each series I, or, if desired,during the series, communicates the digital representation of eachmemory unit in sequence to the digital sums and averages device 23.Device 23 adds up the digital representation of each sample and dividedby the number of samples, i.e., each address content is added (summed)and its average (arithmetic mean) determined. The averaged output ofdevice 23 may, by means of switch 29, be communicated directly to thedigital-to-analog converter. The output of converter 25 is displayed ondisplay 26, which may be, for example,

10 a meter or an oscilloscope.

In accordance with the present invention, the sums and averages of thedevice 23 are communicated to the remainder of the T-tester device 24.It should beunt derstood, however, that the same register (memoryaddresses l418) may be used for certain functions in the T-test, inwhich case the output of the sums and averages device 23 and the T-testdevice 24 would be communicated back to the register-memory via thesequence switch 13 to store the sums.

Consider a four-channel average response computer, such as is describedin the Clynes patent, in which the following alternatives are provided:

All four channels average in the conventional way, together orsequentially. However, an option exists so that Y Channel 1 computes EX(t) Channel 2 computes 2X (t) Channel 3 computes EY (t) Channel 4computes 2Y (t) X and Y' can be two different processes measured at thesame time, or the same process measured at two different times. Themeasurement is made at each ordinate i over an analysis epoch from 0 to-T. 0 is the time at which a perturbation (stimulus) is applied to thesystem, and T is a time period selected by the operator. T is thendivided into a number of equal intervals, determined by the number ofordinates provided in the memory.

The digital representations stored in each channel can be added orsubtracted from the representations in any other channel, and can beerased independently,

resetting all registers to zero sequentially or simultaneously'. Thefirst two steps of computations are shown in FIG. 3, which shows the useof a four-channel memory computer and two counters.

In one implementation, the computation of 0X 0) for each ordinate ofX(t) can be carried out dynamically using repetitive sweep of the D-Asystem through the set of memory registers. This is shown in Step 2 ofFIG. 3. In a second implementation, the computation of o-X (t) isstatic. For subsequent T-test computation, the static version ispreferred. 7

In the static version, 0' X is developed for 1' or ordinate l, as shownin step 2 of FIG. 3. The o' fi is stored as a voltage V 10,? (i,) in asample and hold circuit; the registers holding ZX are reset to zero; thevoltage V [0,, (i,)] is applied to the A-D; and the value of 0,30,) isstored permanently in the register corresponding to ordinate 1. Thissequence is then repeated for each ordinate, developing o' t) from 0 toT.

Then, as Step 3, there occurs a computation of (Ty using the procedureshown in Step 2 of FIG. 3. This is followed by the computation of twhich is Step 4 of this procedure, as shown in FIG. 5, which shows useof an analog device and differential amplifier. Alternatively, theindicated computation should be performed digitally. After Step 3,quantities of FIG. 4 are stored which is followed by t computation shownin FIG. 5. After completion of Step 4, we have the quantities stored inthe computer shown in FIG. 6.

The value of 1' at some particular time can be obtained digitally byinterrogation of ordinate i, or the total or average value of t can beautomatically calculated, or the full set of values of r from i to T canbe appropriately recorded in various ways. Then, counter 2 and channels3 and 4 are erased and a new sample of data Z(i) brought into thecomputer. M, (i), Z and t" x Z are computed. Comparison of 11 with t atany ordinate of interest or over the full epoch from O to T then permitsevaluation of the data.

The T-test device 24 may haveits own long-term memory which, forexample, provides a complete t-Distribution table (Students or Gossetsdistribution), or which stores sets of values of T-instead of storingthem in channel 4.

In FIG. 1, the analog display 26 may be sent to display the results ofthe T-test computation in analog form, by means of the digital-to-analogconverter 25 or alternatively the display may be by means of the digitaldisplay 27. The digital display may be a series of numerical displaytubes, such as tubes, or a print-out device, such as a teleprinter.

The T-test computer has been described as a complete instrument.However, it will be understood that a T-test computer module may be soldas a unit and adapted to be connected to an average response computer.Having regard to FIG. 6 the average response computer 105 may be alreadyin the customers possession. He will then add to it the T-test moduleconsisting of the squaring circuits 106 and 107 and the circuitrystarting with the squaring circuits 112 and 113 and including thecircuits to the right of circuits 112 and 113. As explained above, thesample and hold circuits 102 and 111 are optional. The connections ofthe T-test module to the average response computer would be the outputlines from squaring circuits 106 and 107 and the input lines to themodule of lines 108,109,110 and 110.

We claim:

1. A special purpose computer for the computation of the t" test,including a first squaring means to provide the squares of a sequence ofvoltage values X and Y to provide their squared values X and Y anaverage response computer connected to the output of said first squaringmeans and having a first summing means which provides the sum of thevoltage values X over repeated cycles providing EX and the sum of adifferent set of voltage values Y over repeated cycles providing EY andthe sums of the squared values 2X and 2Y counter means for counting therepeated cycles to provide N and N,,, and a first division meansconnected to the output of said summing means and to the counter meansto divide each of said sums by the number of; the repeated cycles N, andN a second squaring means connected to the output of said averageresponse computer to provide the square of the sums (EX/N and (EYIN V afirst differential means connected to the output of said second squaringmeans and to said average response computer to generate the quantities asecond divider means connected to the output of said differential meansand to the counter means to divide the respective variances by thenumber of repeated cycles to provide averaged variances 01 W, andcrfN 1addition means connected to the output of said second divider means toadd said averaged variances;

a square root means connected to the output of said addition means toprovide the square root of said added variances;

a second differential means connected to said average response computerto provide the subtraction EX/N Z YIN and a third divider meansconnected to the outputs of said second differential means and to saidsquare root means to provide the signal corresponding to the T-testresult of EX/N, E Y/N, (mc N +o'y INu)1/2.

2. A special purpose computer including the special purpose computer forthe computation'of the T-test as claimed in claiml and further includingstorage means responsive to the signal corresponding to the said T-testresult, said storage responsive means storing the signals correspondingto the T-test results of a first and a subsequent second analysis of aprocess, comparison means comparing the said two stored signals, andmeans producing a signal which corresponds to the said comparison.

3. A special purpose computer including the special purpose computer forthe computation of the T-test as claimed in claim 1 and furtherincluding comparison means which is responsive to the signalcorresponding to the said T-test result and compares that signal with apredetermined standard, and means producing a signal which correspondsto the said comparison.

4. A special purpose computer module for the computation of the T-test,said module connectable to an average response computer having fourchannels, said average response computer having a first summing meanswhich provides the sum of the voltage values X over repeated cyclesproviding EX and the sum of a different set of voltage values Y overrepeated cycles providing ZY and the sums of the squared values 2X andSW, counter means for counting the repeated cycles to provide N, and Nand a first division means connected to the output of said summing meansand to the counter means to divide each said sums by the number of therepeated cycles N, and N,

said computer module including:

a first squaring means having an input and an output, the inputconnectable to receive a sequence of voltage values X and Y and thesquaring means providing at its output the squared values X and Y saidsquaring means having its output connectable to the input of saidaverage response computer;

a second squaring means connectable to the output of said averageresponse computer to provide the square of the sums (EX/N and (EY/N V afirst differential means connected to output of said second squaringmeans and connectable to said average response computer to generate thequantities (EX N (EX/N 0, and (ZY' N (2 Y/N,, =0

a second divider means connected to the output of said differentialmeans and connectable to the a third divider means connected to theoutputs of said second differential means and to said square root meansto provide the signal corresponding to the T-test result of ZX/N -EY/N,,/ (OXZINI 03, y)1l2.

5. A special purpose computer including the special purpose computermodule for the computation of the T-test as claimed in claim 4 andfurther including storage means responsive to the signal correspondingto the said t test result, said storage responsive means storing thesignals corresponding to the T-test results of a first and a subsequentsecond analysis of a process, comparison means comparing the said twostored signals, and means producing a signal which corresponds to thesaid comparison.

6. A special purpose computer including the special purpose computermodule for the computation of the T-test as claimed in claim 4 andfurther including comparison means which is responsive to the signalcorresponding to the said T-test result and compares that signal with apredetermined standard, and means producing a signal which correspondsto the said comparison.

1. A special purpose computer for the computation of the ''''t'''' test,including a first squaring means to provide the squares of a sequence ofvoltage values X and Y to provide their squared values X2 and Y2; anaverage response computer connected to the output of said first squaringmeans and having a first summing means which provides the sum of thevoltage values X over repeated cycles providing Sigma X and the sum of adifferent set of voltage values Y over repeated cycles providing Sigma Yand the sums of the squared values Sigma X2 and Sigma Y2, counter meansfor counting the repeated cycles to provide Nx and Ny, and A firstdivision means connected to the output of said summing means and to thecounter means to divide each of said sums by the number of; the repeatedcycles Nx and Ny; a second squaring means connected to the output ofsaid average response computer to provide the square of the sums ( SigmaX/Nx)2 and ( Sigma Y/Ny)2; a first differential means connected to theoutput of said second squaring means and to said average responsecomputer to generate the quantities ( Sigma X2/Nx) - ( Sigma X/Nx)2sigma x2 and ( Sigma Y2/Ny) - ( Sigma Y/Ny)2 sigma y2; a second dividermeans connected to the output of said differential means and to thecounter means to divide the respective variances by the number ofrepeated cycles to provide averaged variances sigma x2/Nx and sigmay2/Ny; addition means connected to the output of said second dividermeans to add said averaged variances; a square root means connected tothe output of said addition means to provide the square root of saidadded variances; a second differential means connected to said averageresponse computer to provide the subtraction Sigma X/Nx - Sigma Y/Ny;and a third divider means connected to the outputs of said seconddifferential means and to said square root means to provide the signalcorresponding to the T-test result of Sigma X/Nx Sigma Y/Ny / ( sigmax2/Nx + sigma y2/Ny)1/2.
 2. A special purpose computer including thespecial purpose computer for the computation of the T-test as claimed inclaim 1 and further including storage means responsive to the signalcorresponding to the said T-test result, said storage responsive meansstoring the signals corresponding to the T-test results of a first and asubsequent second analysis of a process, comparison means comparing thesaid two stored signals, and means producing a signal which correspondsto the said comparison.
 3. A special purpose computer including thespecial purpose computer for the computation of the T-test as claimed inclaim 1 and further including comparison means which is responsive tothe signal corresponding to the said T-test result and compares thatsignal with a predetermined standard, and means producing a signal whichcorresponds to the said comparison.
 4. A special purpose computer modulefor the computation of the T-test, said module connectable to an averageresponse computer having four channels, said average response computerhaving a first summing means which provides the sum of the voltagevalues X over repeated cycles providing Sigma X and the sum of adifferent set of voltage values Y over repeated cycles providing Sigma Yand the sums of the squared values Sigma X2 and Sigma Y2, counter meansfor counting the repeated cycles to provide Nx and Ny, and a firstdivision means connected to the output of said summing means and to thecounter means to divide each said sums by the number of the repeatedcycles Nx and Ny; said computer module including: a first squaring meanshaving an input and an output, the input connectable to receive asequence of voltage values X and Y and the squaring means providing atits output the squared values X2 and Y2, said squaring means having itsoutput connectable to the input of said average response computer; asecond squaring means connectable to the output of said average responsecomputer to provide the square of the sums ( Sigma X/Nx)2 and ( SigmaY/Ny)2; a first differential means connected to output of said secondsquaring means and connectable to said average response computer togenerate the quantities ( Sigma X2/Nx) - ( Sigma X/Nx)2 sigma x2 and (Sigma Y2/Ny) - ( Sigma Y/Ny)2 sigma y2 a second divider means connectedto the output of said differential means and connectable to the countermeans to divide the respective variances by the number of repeatedcycles to provide averaged variances sigma X2/Nx and sigma Y2/Ny;addition means connected to the output of said second divider means toadd said averaged variances; a square root means connected to the outputof said addition means to provide the square root of said addedvariances; a second differential means connectable to said averageresponse computer to provide the subtraction Sigma X/Nx - Sigma Y/Ny ;and a third divider means connected to the outputs of said seconddifferential means and to said square root means to provide the signalcorresponding to the T-test result of Sigma X/Nx -Sigma Y/Ny / ( sigmaX2/Nx + sigma y2/Ny)1/2.
 5. A special purpose computer including thespecial purpose computer module for the computation of the T-test asclaimed in claim 4 and further including storage means responsive to thesignal corresponding to the said ''''t'''' test result, said storageresponsive means storing the signals corresponding to the T-test resultsof a first and a subsequent second analysis of a process, comparisonmeans comparing the said two stored signals, and means producing asignal which corresponds to the said comparison.
 6. A special purposecomputer including the special purpose computer module for thecomputation of the T-test as claimed in claim 4 and further includingcomparison means which is responsive to the signal corresponding to thesaid T-test result and compares that signal with a predeterminedstandard, and means producing a signal which corresponds to the saidcomparison.